IEEE - Institute of Electrical and Electronics Engineers, Inc. - 1005-1998

IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays

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Organization: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1998
Status: inactive
Page Count: 129
ICS Code (Transistors): 31.080.30
ISBN (Paper): 0-7381-0620-8
ISBN (Online): 0-7381-3952-1
DOI: 10.1109/IEEESTD.1998.89425
Standard:

Summary form only given. This standard describes the underlying physics and the operation of floating gate memory arrays, specifically, UV erasable EPROM, byte rewritable E/sup 2/PROMs, and block... View More

Document History

1005-1998
January 1, 1998
IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays
Summary form only given. This standard describes the underlying physics and the operation of floating gate memory arrays, specifically, UV erasable EPROM, byte rewritable E/sup 2/PROMs, and block...
October 17, 1991
IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays
An introduction to the physics unique to this type of memory and an overview of typical array architectures are presented. The variations on the basic floating gate nonvolatile cell structure that...
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