IEEE - Institute of Electrical and Electronics Engineers, Inc. - 1450.6.1-2009
IEEE Standard for Describing On-Chip Scan Compression
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| Organization: | IEEE - Institute of Electrical and Electronics Engineers, Inc. |
| Publication Date: | 13 July 2009 |
| Status: | inactive |
| Page(s): | 1 - 56 |
| ICS Code (Languages used in information technology): | 35.060 |
| ISBN (Electronic): | 978-0-7381-5962-1 |
| DOI: | 10.1109/IEEESTD.2009.5165453 |
Standard:
This standard defines how the necessary information is passed from scan insertion to pattern generation and from pattern generation to diagnosis such that different tool vendors could be used for... View More
Document History
February 24, 2012
IEEE Standard Test Interface Language (STIL) for Digital Test Vector Data-Core Test Language (CTL)
The Core Test Language (CTL) is a language created for a System-on-Chip flow (or SoC flow), where a design created by one group is reused as a sub-design of a design created by another group. In an...
1450.6.1-2009
July 13, 2009
IEEE Standard for Describing On-Chip Scan Compression
This standard defines how the necessary information is passed from scan insertion to pattern generation and from pattern generation to diagnosis such that different tool vendors could be used for...