IEEE - Institute of Electrical and Electronics Engineers, Inc. - 960-1993
8. Primitive FASTBUS Action Routines
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| Organization: | IEEE - Institute of Electrical and Electronics Engineers, Inc. |
| Publication Date: | 1 January 1994 |
| Status: | active |
| Page Count: | 6 |
| ISBN (Paper): | 1-55937-396-2 |
| ISBN (Online): | 0-7381-0723-9 |
| DOI: | 10.1109/IEEESTD.1994.79614 |
Document History
January 1, 1994
10. Interconnection of Segments
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January 1, 1994
IEEE Standard FASTBUS Modular High-Speed Data Acquisition and Control System and IEEE FASTBUS Standard Routines
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January 1, 1994
1. Introduction and General Information
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January 1, 1994
2. Conventions, Definitions, Abbreviations, Symbols and References
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January 1, 1994
3. Signals, Signal Lines, and Pins
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January 1, 1994
4. FASTBUS Operations: Addressing
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January 1, 1994
5. FASTBUS Operations: Timing, Sequences and Responses
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January 1, 1994
7. Ancillary Logic on a Segment
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January 1, 1994
8. Control and Status Register Space
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January 1, 1994
11. Block and Pipelined Transfers
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January 1, 1994
Annex A. Requirements for Various Implementations
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January 1, 1994
Annex B. Front Panel Interconnections for ECL
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January 1, 1994
Annex C. Cable Segment Implementation
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January 1, 1994
Annex D. Implementation Examples of Master Requirements
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January 1, 1994
Annex E. FASTBUS Segment Interconnect Type S-1
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January 1, 1994
Annex F. Module Implementation
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January 1, 1994
Annex G. Examples of Type a Crate Implementation
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January 1, 1994
Annex H. Examples of Type W Crate and Type W Module Assembly
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January 1, 1994
Annex I. Typical Power Supplies
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