IEEE - Institute of Electrical and Electronics Engineers, Inc. - 960/1177-1989

IEEE Standard FASTBUS Modular High-Speed Data Acquisition and Control System and IEEE FASTBUS Standard Routines

superseded - Reaffirmed , Revision of
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Organization: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 10 April 1990
Status: superseded
Page(s): 1 - 339
ICS Code (Microprocessor systems): 35.160
ISBN (Electronic): 978-0-7381-4427-6
DOI: 10.1109/IEEESTD.1990.95743
Standard:

In IEEE Std 960-1989, IEEE Standard FASTBUS Modular High-speed Data Acquisition and Control System, mechanical, signal, electrical, and protocol specifications are given for a modular data bus... View More

Document History

January 1, 1994
10. Interconnection of Segments
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January 1, 1994
IEEE Standard FASTBUS Modular High-Speed Data Acquisition and Control System and IEEE FASTBUS Standard Routines
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January 1, 1994
1. Introduction and General Information
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4. FASTBUS Operations: Addressing
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5. FASTBUS Operations: Timing, Sequences and Responses
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15. Power
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16. Cable Segment
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Annex C. Cable Segment Implementation
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Annex D. Implementation Examples of Master Requirements
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Annex E. FASTBUS Segment Interconnect Type S-1
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Annex F. Module Implementation
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Annex G. Examples of Type a Crate Implementation
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Annex H. Examples of Type W Crate and Type W Module Assembly
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Annex K. Components
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Annex L. Construction and System Requirements
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Annex M. System and Circuit Protection
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IEEE FASTBUS Standard Routines
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1. Overview
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4. Operational Parameters
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5. Data Buffers
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6. Simple Transaction Routines
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7. Compound Transaction Routines
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10. Synchronization, System Resource and Port Routines
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11. Status and Error Handling
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2. Conventions, Definitions, Abbreviations, Symbols and References
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