IEEE - Institute of Electrical and Electronics Engineers, Inc. - P1149.10/D94, Dec 2016
IEEE Draft High Speed Test Access Port and On-chip Distribution Architecture
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| Organization: | IEEE - Institute of Electrical and Electronics Engineers, Inc. |
| Publication Date: | 1 January 2016 |
| Status: | inactive |
| Page(s): | 1 - 114 |
| ISBN (Electronic): | 978-1-5044-3689-2 |
Standard:
Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards, assembled multi-die packages and the test of die internal... View More
Document History
July 28, 2017
IEEE Standard for High-Speed Test Access Port and On-Chip Distribution Architecture
Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and support of assembled printed circuit boards, assembled multi-die packages, and the test of die internal...
January 1, 2017
IEEE Approved Draft High Speed Test Access Port and On-chip Distribution Architecture
Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards, assembled multi-die packages and the test of die internal...
January 1, 2016
IEEE Draft High Speed Test Access Port and On-chip Distribution Architecture
Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards, assembled multi-die packages and the test of die internal...
P1149.10/D94, Dec 2016
January 1, 2016
IEEE Draft High Speed Test Access Port and On-chip Distribution Architecture
Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards, assembled multi-die packages and the test of die internal...
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