IEEE - Institute of Electrical and Electronics Engineers, Inc. - 1500-2005

IEEE Standard Testability Method for Embedded Core-based Integrated Circuits

active - Reaffirmed
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Sponsor(s): Inst. Electr. & Electron. Eng., New York, NY
Organization: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 29 August 2005
Status: active
Page(s): 1 - 136
ICS Code (Integrated circuits. Microelectronics): 31.200
ISBN (Electronic): 978-0-7381-4694-2
DOI: 10.1109/IEEESTD.2005.96465
Regular:

This standard defines a mechanism for the test of core designs within a system on chip (SoC). This mechanism constitutes a hardware architecture and leverages the core test language (CTL) to... View More

Standard:

This standard defines a mechanism for the test of core designs within a system on chip (SoC). This mechanism constitutes a hardware architecture and leverages the core test language (CTL) to... View More

Document History

P1500/D11, Jan 06
January 1, 2006
IEEE Draft Standard Testability Method for Embedded Core-Based Integrated Circuits
A description is not available for this item.
1500-2005
August 29, 2005
IEEE Standard Testability Method for Embedded Core-based Integrated Circuits
This standard defines a mechanism for the test of core designs within a system on chip (SoC). This mechanism constitutes a hardware architecture and leverages the core test language (CTL) to...

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