IEEE - Institute of Electrical and Electronics Engineers, Inc. - 1149.7-2009

IEEE Standard for Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture

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Organization: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 10 February 2010
Status: active
Page(s): 1 - 985
ICS Code (Interface and interconnection equipment): 35.200
ISBN (Online): 978-0-7381-6153-2
DOI: 10.1109/IEEESTD.2010.5412866
Regular:

This specification describes circuitry that may be added to an integrated circuit to provide access to on-chip test access ports (TAPs) specified by IEEE Std 1149.1-+-2001. The circuitry uses IEEE... View More

Standard:

This specification describes circuitry that may be added to an integrated circuit to provide access to on-chip Test Access Ports (TAPs) specified by IEEE Std 1149.1TM-2001. The circuitry uses IEEE... View More

Document History

1149.7-2009
February 10, 2010
IEEE Standard for Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture
This specification describes circuitry that may be added to an integrated circuit to provide access to on-chip test access ports (TAPs) specified by IEEE Std 1149.1-+-2001. The circuitry uses IEEE...
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