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FPGA implementation of a combined hamming GÇö AES error tolerant algorithm for on board satellite
2015 Edition, June 1, 2015 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

LEO satellites operate in a harsh radiation environment and therefore any electronic systems used on-board are very susceptible to faults induced by radiation., This paper presents an algorithm to protect the on board encryption process from Single...

Fault-Tolerant Encryption for Space Applications
2009 Edition, Volume 45, January 1, 2009 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper is concerned with the use of commercial security algorithms like the Advanced Encryption Standard (AES) in Earth observation small satellites. The demand to protect the sensitive and valuable data transmitted from satellites to ground has increased and...

Synthesizable Heterogeneous FPGA Fabrics
2018 Edition, December 1, 2018 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

We present an automated framework for the generation of synthesizable FPGAs with heterogeneous functional blocks and carry chains, as modelled with the open-source Verilog-to-Routing (VTR) FPGA architecture evaluation framework. VTR's modelling of hardened blocks,...

FPGA Accelerated FPGA Placement
2019 Edition, September 1, 2019 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Placement is one of the runtime bottlenecks in an FPGA design implementation flow, in which global placement accounts for a major portion of the runtime. In this paper, we demonstrate FPGA acceleration of wirelength gradient computation, which...

FPGA placement and routing
2017 Edition, November 1, 2017 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

FPGAs have emerged as a popular style for modern circuit designs, due mainly to their non-recurring costs, in-field reprogrammability, short turn-around time, etc. A modern FPGA consists of an array of heterogeneous logic components, surrounded by...

Intelligent FPGA Data Acquisition Framework
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

In this paper we present the FPGA-based framework IFDAQ which is used for the development of data acquisition systems for detectors in high energy physics. The framework supports Xilinx FPGA and provides a collection of IP cores written in VHDL which...

Full FPGA game machine
2016 Edition, January 1, 2016 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Currently, many consumer game machines are based on the operations of processors. However, in the field programmable gate array (FPGA) research field, various FPGA game solvers have been developed recently. The processing speeds of such FPGA game solvers...

FPGA development in ATE
2017 Edition, September 1, 2017 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

In recent years, synthetic test instruments have become increasingly popular in the automatic test equipment (ATE) market. This type of instrument gives users the ability to create custom solutions to better meet their test requirements. FPGA (Field Programmable Gate Array) based...

FPGA-Based Simulated Bifurcation Machine
2019 Edition, September 1, 2019 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Since many combinatorial optimization problems can be mapped onto ground-state search problems of Ising models, special-purpose machines for Ising problems have attracted intense attention. Simulated bifurcation (SB) is a recently proposed algorithm to solve these Ising...

FPGA Resource Pooling in Cloud Computing
Volume PP - IEEE Computer Society

Cloud providers have started to deploy various FPGA accelerators in their datacenters because the performance of many applications can be significantly improved by implementing their core routines in FPGAs. In conventional datacenters with FPGA accelerated...

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