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Design and simulation of a low-power 0.18 μm CMOS MedRadio band LNA
2017 Edition, October 1, 2017 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents the design and simulation of a low-power MedRadio band low noise amplifier (LNA) using standard 0.18 μm CMOS process. This LNA utilizes current reuse and active shunt feedback circuit techniques to achieve (on...

Design of low-power K-band low-noise amplifier in 0.18 μm CMOS
2010 Edition, August 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A K-band low-noise amplifier (LNA) is designed and fabricated in a standard 0.18 μm CMOS technology. A design method of CMOS LNA is used to render the optimum source resistance (R opt ) close to 50 Ω and Z in...

A 3.4dB NF k-band LNA in 65nm CMOS technology
2013 Edition, May 1, 2013 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a k-band (18-26.5 GHz) high gain low noise amplifier (LNA) in 65-nm CMOS mixed signal process. The LNA has a peak gain of 20.46 dB at 22.45 GHz and a -3 dB bandwidth of 3.8 GHz. S11 of the chip is...

Design of a 2.4 GHz low noise amplifier in 0.25 μm CMOS technology
2007 Edition, August 1, 2007 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A RF low noise amplifier used in Wireless Local Area Net system receiver, has been implemented in 0.25 μm CMOS technology. This paper analyzes low-noise amplifier (LNA) cascode topology, noise matching and input matching...

Compact ESD Protection Design for CMOS Low-Noise Amplifier
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A low-noise amplifier (LNA) is the input part of a radio frequency (RF) transceiver, which is vulnerable to electrostatic discharge (ESD). When ESD events occur, they may change the original characteristics of the LNA, such as gain decrease and noise figure...

A Low-Voltage Low-Power K-Band CMOS LNA Using DC-Current-Path Split Technology
2010 Edition, Volume 20, September 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A low-voltage low-power K-band low-noise amplifier (LNA) using 0.18 μm CMOS technology is presented in this letter. By splitting the dc current paths, the supply voltage of the LNA is effectively reduced. Moreover,...

Compact ESD Protection Design for CMOS Low-Noise Amplifier
2020 Edition, Volume 67, January 1, 2020 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A low-noise amplifier (LNA) is the input part of a radio frequency (RF) transceiver, which is vulnerable to electrostatic discharge (ESD). When ESD events occur, they may change the original characteristics of the LNA, such as gain decrease and noise figure...

CMOS K-band receiver architectures for low-IF applications
2011 Edition, September 1, 2011 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Two K-band low-IF receivers, a single channel receiver and a quadrature receiver, are designed and fabricated in a 130 nm CMOS process. It is demonstrated that, with the proposed polyphase filter, the quadrature receiver is able to achieve similar...

Ultra-Low-Power X-band SiGe HBT Low-Noise Amplifiers
2007 Edition, June 1, 2007 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

The performance of four low power X-band low-noise amplifier (LNA) topologies implemented in a 0.18 μm SiGe BiCMOS technology is compared. All versions are fully integrated and designed to achieve a gain of 15 dB and a...

A K-band low noise amplifier with on-chip baluns in 90nm CMOS
2015 Edition, August 1, 2015 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a CMOS K-band low noise amplifier (LNA). Pseudo differential structure with on-chip balun has more advantages than single-end in system-on-chip (SOC) and so forth. In this design, two on-chip baluns are inserted...

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