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A 2 MHz 1 V programmable gain amplifier for WSN application
2013 Edition, August 1, 2013 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a low-voltage and low-power programmable gain amplifier (PGA) for Wireless Sensor Network (WSN) in 0.18 μm CMOS process. MOSFETs biased to moderate inversion region are applied in order to achieve maximum voltage gain, low...

A low distortion, current feedback, programmable gain amplifier
2005 Edition, January 1, 2005 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A programmable gain amplifier (PGA) is designed in a 0.18 /spl mu/m CMOS process, which makes use of current feedback building blocks. The voltage gain of the PGA can be changed from 0 dB to +60 dB with 2 dB steps and has a -3 dB...

A low power programmable gain amplifier with 70-dB control range in CMOS technology
2011 Edition, September 1, 2011 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a low power programmable gain amplifier (PGA) for low intermediate frequency (IF) Zigbee transceiver applications in 0.18-µm CMOS process. The designed PGA uses ac coupling between the stages to avoid the amplification of DC...

Design of a Voltage-Controlled Programmable-Gain Amplifier in 65-nm CMOS Technology
2019 Edition, June 1, 2019 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A voltage-controlled programmable-gain amplifier (VC-PGA) is designed in this work. The power consumption of the VC-PGA is binary-weighted. In contrast to conventional PGAs, the gain step of the designed PGA can be continuously tuned by a...

A 25-MHz bandwidth, 37-dB gain range CMOS Programmable Gain Amplifier with DC-Offset cancellation and driver buffer
2012 Edition, October 1, 2012 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A CMOS Programmable Gain Amplifier (PGA) with a 3-dB bandwidth of higher than 25MHz and a gain range of 37 dB is presented. Its core consists of two gain stages and a buffer stage. Voltage gain is programmable by...

A wideband 0 to 60 dB CMOS variable gain amplifier for IR-UWB I/Q receivers
2009 Edition, September 1, 2009 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper reports on the realization of a variable gain amplifier (VGA) with an automatic gain control (AGC) loop for impulse-radio ultra-wideband (IR-UWB) signals. The circuit shows a gain range between 0 and 60 dB and a −3 dB bandwidth...

A CMOS programmable gain amplifier with a novel DC-offset cancellation technique
2010 Edition, September 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A programmable gain amplifier (PGA) with a novel DC offset cancellation (DCOC) technique for IEEE 802.11b/g wireless LAN direct-conversion receiver (DCR) is presented. An operational amplifier (OPAMP) utilizing an improved Miller compensation approach is...

A 35-dBm OIP3 CMOS Constant Bandwidth PGA with Extended Input Range and Improved Common-mode Rejection
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

an improved CMOS CCII with adaptive control circuit (ACC) is proposed, and is used to build a highly linear transconductance-transimpedance programmable gain amplifier (PGA). This PGA is fabricated in a 0.18-μm CMOS technology and draws 0.58...

Design considerations and implementation of a programmable high-frequency continuous-time filter and variable-gain amplifier in submicrometer CMOS
1999 Edition, Volume 34, December 1, 1999 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

We report on an approach to designing high-speed, low-voltage programmable continuous-time filters with an embedded variable-gain amplifier (VGA). The methods we describe here are aimed at implementation in ultra-short-channel, low-voltage CMOS technologies. The...

A Digitally Programmable CMOS Feedback ASIC for Highly Stable MEMS-Referenced Oscillators
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper describes a digitally programmable single-chip feedback ASIC for MEMS-referenced oscillators in the 0.4-15-MHz range. The chip contains a differential-difference low-noise amplifier (DD-LNA), a variable-gain amplifier (VGA)...

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