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A 16Gbps laser-diode driver with interwoven peaking inductors in 0.18-µm CMOS
2010 Edition, September 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A laser-diode (LD) driver with interwoven mutually-coupled peaking inductors for high-speed optical networks is presented. Six and four inductors are interwoven into two sets of inductors for area-effective implementation as well as performance enhancement. The proposed circuit is fabricated...

The experimental study of THz image sensor in 0.18 µm CMOS technology
2014 Edition, November 1, 2014 - Institute of Electronics, Information and Communication Engineers, The (IEIC)

In this study, four different types of power detectors are implemented in 0.18 µm CMOS technology for the THz image sensor application. These power detectors include common-source with and without supply voltage, and common-gate with and without supply voltage. The measured...

Temperature-compensated MOS dosimeter fully integrated in a high-voltage 0.35 µm CMOS process
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents the design, fabrication and characterization of an integrated differential dosimeter based on the mismatch of two identical FOXFETs. This dosimeter was fabricated in a high-voltage 0.35 µm CMOS process, where the FOXFET and the biasing circuit were integrated in...

Monolithic 28.3 THz thermal image sensor incorporating 0.18-µm CMOS foundry
2010 Edition, May 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a fully monolithic approach to the design and fabrication of THz CMOS image sensor operating at 28.3 THz using the mass-producible 0.18-µm 1P6M CMOS foundry. The CMOS sensor consists of antenna-coupled transducer, linearly transforming the intercepted...

A 2.5GHz low phase noise LC VCO for WLAN applications in 0.18-µm CMOS technology
2009 Edition, October 1, 2009 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A 2.5GHz LC voltage controlled oscillator with low phase noise design and optimization is presented. The LC VCO is implemented in 0.18-µm CMOS technology and used for wireless local area network. The proposed VCO achieves phase noise of −128.7dBc/Hz at 1MHz offset, −105.4dBc/Hz...

A 1mm2 1.3mW GSM/EDGE digital baseband receiver ASIC in 0.13 µm CMOS
2010 Edition, September 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper addresses complexity issues at algorithmic and architectural level of digital baseband receiver ASIC design for GSM/GPRS/EDGE, in order to reduce power and die area as desired for cellular applications. A 2.5G multi-mode architecture is implemented in 0.13 µm CMOS...

A 0.4-V 1.08-mW 12-GHz high-performance VCO in 0.18-µm CMOS
2012 Edition, January 1, 2012 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A low-voltage low-power high-performance fully-integrated 0.18-µm CMOS voltage-controlled oscillator (VCO) is presented in this paper. By increasing device size of the nMOS cross-coupled pair, not only transconductance (g m ) of the MOSFET can be enhanced, but...

A 3.6 Gb/s 60 mW 4:1 multiplexer in 0.35-µm CMOS
2010 Edition, Volume 2, September 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A tree-type 4:1 multiplexer (MUX) is designed by employing CMOS logic and eliminating impedance matching of the signal ports. The proposed circuit is realized in a 0.35-µm CMOS process. With the whole power consumption of 60 mW from a 3.3 V supply...

Bandwidth enhancement for 0.18 µm CMOS transimpedance amplifier circuit
2013 Edition, December 1, 2013 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

In this paper, a low noise and high bandwidth transimpedance amplifier (TIA) is designed for optical receiver using a 0.18 μm standard in CMOS technology. The proposed circuit operates at a data rate of 13.25 Gb/s. Employing a series inductive...

A 275 MHz quadrature modulator in 0.18-µm CMOS
2012 Edition, May 1, 2012 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A new digital modulator has a very efficient implementation. A 0.18-μm CMOS prototype, fabricated at TSMC, runs at clock-rates up to 275 MHz and dissipates less than 40 mW. At the 250 MHz design target, it dissipates 34.2 mW.

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