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2.75 GHz low noise 0.35 µm CMOS transimpedance amplifier
2010 Edition, June 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A low-noise and high-bandwidth Transimpedance Amplifier (TIA) at 2.75 GHz has been implemented in 0.35 µm CMOS technology. The designed amplifier is configured on three identical stages that use an active load. This structure operates at 3.3V power supply...

77 GHz integrated patch antennae in 0.18 µm CMOS technology
2016 Edition, December 1, 2016 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents two patch antennae at a nominal resonance frequency of 77 GHz, namely a thin-substrate antenna and a thick-substrate antenna, using a standard 0.18 µm CMOS technology. Both the antennae are implemented on metal-6. The thin-substrate antenna...

A 4-stream 802.11n baseband transceiver in 0.13 µm CMOS
2009 Edition, June 1, 2009 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

An IEEE 802.11n baseband transceiver ASIC is implemented in 0.13 µm CMOS technology. The implementation has a core area of 14.4mm2 and is the first to support the optional 3- and 4-stream MIMO transmission modes of the standard for data rates up to 600 Mbps.

A miniature switching phase shifter in 0.18-µm CMOS
2009 Edition, December 1, 2009 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A miniature 3-bit switching phase shifter using standard 0.18-µm CMOS process is presented in this paper. By using thin-film meander-line to shrink the size of inductor, the chip area can be reduced to 0.285 mm2. This circuit demonstrates an RMS phase error of smaller than 5.3° and an...

A 0.18 µm CMOS multi-Gb/s 10-PAM transmitter
2009 Edition, December 1, 2009 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A multi-Gb/s transmitter using multi-level pulse amplitude modulation (M-PAM) is presented. 10-PAM enables transmitter to decrease the symbol rate compared to binary signaling. The transmitter transmits data in current-mode instead of voltage mode, so that high switching speed of driver is...

Radiation characterization of the austriamicrosystems 0.35 µm CMOS technology
2011 Edition, September 1, 2011 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

The design of mixed-signal ASICs for space requires a detailed knowledge of the behaviour of the technology to be used in an environment imposing radiation levels and temperatures beyond those found in standard applications. Commercial foundries providing standard CMOS technologies do...

Charge pump regulation with integrated 0.35 µm CMOS control circuit
2012 Edition, October 1, 2012 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper introduces the design of charge pump DC-DC boost converter with integrated low-voltage control circuit. By exploiting the advantage presented by the integration of both charge pump and control circuit within same CMOS technology, the DC-DC boost converter offers a...

A 256 Pixel Magnetoresistive Biosensor Microarray in 0.18 µm CMOS
2013 Edition, Volume 48, May 1, 2013 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Magnetic nanotechnologies have shown significant potential in several areas of nanomedicine such as imaging, therapeutics, and early disease detection. Giant magnetoresistive spin-valve (GMR SV) sensors coupled with magnetic nanotags (MNTs) possess great promise as ultra-sensitive biosensors for...

A 0.35 µm CMOS LC-tank injection-locked frequency divider
2010 Edition, March 1, 2010 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A divide-by-2 injection-locked frequency divider (ILFD) has been designed in a 0.35 µm CMOS process. The ILFD circuit is realized with a differential CMOS LC-tank oscillator with an injection MOS. Simulation results show that at the supply voltage of 2.5 V and by...

Low noise and high bandwidth 0.35 µm CMOS transimpedance amplifier
2009 Edition, December 1, 2009 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper describes and analyzes the optimization of a low-noise and high-bandwidth transimpedance amplifier featuring a large dynamic range. The designed amplifier is configured on three identical stages that use an active load. This topology displays a...

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