loading
A Low Power Fast Settling CMOS S&H utilizing Auxiliary Slew Circuits
2007 Edition, November 1, 2007 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

In this work new modifications to flip-around sample and hold amplifier (S&H) are presented, which improve slew rate and settling behavior of the S&H. It also results in power minimization of the OTA. Design procedure for maximum spurious free...

A fast settling CMOS operational amplifier
2003 Edition, Volume 1, January 1, 2003 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A fully differential, low-voltage, low-power, fast settling operational amplifier is presented. The proposed circuit employs a novel continues-time common-mode feedback and a slew rate enhancement circuit. With a...

A Low-Ripple Fast-Settling CMOS Envelope Detector
2006 Edition, January 1, 2006 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

The design of a high performance envelope detector is made in this work. Proposed circuit does not need the traditional compensation between keeping and tracking required in these circuits due to a system by what the signal peaks are held in two periods and combined to...

Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications
2003 Edition, January 1, 2003 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a new fully differential operational transconductance amplifier (OTA) for low-voltage and fast-settling switched-capacitor circuits in digital CMOS technology. The proposed two-stage OTA is a hybrid class A/AB that combines...

Fast-settling CMOS operational amplifiers with negative conductance voltage gain enhancement
2001 Edition, Volume 1, January 1, 2001 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Negative conductance voltage gain enhancement techniques which substantially increases the DC gain of an operational amplifier without degrading speed are discussed. Three fully differential CMOS op amps using the negative conductance gain enhancement technique are presented. Simulations...

Fast-settling CMOS two-stage operational transconductance amplifiers and their systematic design
2002 Edition, Volume 2, January 1, 2002 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Compared to single-stage OTAs, two-stage OTAs have higher gain and output swing, but more poles and zeros and thus have more complex settling behavior. Two structures of two-stage OTAs that have good settling performance are introduced. By analyzing the settling behavior of the...

A fast-settling CMOS op amp for SC circuits with 90-dB DC gain
1990 Edition, Volume 25, December 1, 1990 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A technique that combines the high-frequency behavior of a single-stage op amp with the high DC gain of a multistage design is presented. This technique is based on the concept that a very high DC gain can be achieved in combination with any unity-gain frequency...

A fast-settling CMOS op amp with 90 dB DC-gain and 116 MHz unity-gain frequency
1990 Edition, January 1, 1990 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

An op amp that exhibits single-pole settling behavior using an auxiliary amplifier that boosts gain without degrading settling time is described. The technique for increasing the DC gain is based on increasing cascoding by adding an additional gain stage. In this way the output...

A fast-settling 3 V CMOS buffer amplifier
1996 Edition, Volume 43, June 1, 1996 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a two-stage fast, power-efficient 3 V CMOS buffer amplifier with rail-to-rail input/output voltage ranges. Because of its constant g/sub m/, class-AB input stage, the amplifier is free of slew-rate limitation and its settling-time is...

Current reusing low power fast settling multi-standard CMOS fractional-N frequency synthesizer
2011 Edition, November 1, 2011 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A low power fast settling multi-standard CMOS fractional-N frequency synthesizer is proposed. The current reusing and frequency presetting techniques are adopted to realize the low power fast settling multi-standard fractional-N...

Advertisement