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A chip-scale sub-μg/Hz1/2 optomechanical DC accelerometer at the thermodynamical limit
2016 Edition, June 1, 2016 - Optical Society (The) (OSA)

Here we report a record solid-state optomechanical oscillator for acceleration detection down to the thermodynamical limit, at 730 ng/Hz1/2 resolution and 193 ng/Hz sensitivity, through optical pumping and RF readout of the...

A photonic integrated resonant accelerometer
2016 Edition, October 1, 2016 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

We demonstrate a novel photonic integrated accelerometer having 6 μg/√Hz sensitivity. The device was realized by integrating millimeter-scale mechanical structures with sub-micron silicon photonics using a 200-mm silicon toolset. We review our...

A 0.4 $\mu \text{g}$ Bias Instability and 1.2 $\mu \text{g}/\surd $ Hz Noise Floor MEMS Silicon Oscillating Accelerometer With CMOS Readout Circuit
2017 Edition, Volume 52, February 1, 2017 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper describes a silicon-on-insulator MEMS oscillating accelerometer with a fully differential CMOS continuous-time oscillation sustaining circuit and a digital frequency measurement circuit. To reduce the amplitude-stiffness-induced frequency variation,...

A 10 mW, 0.4 $\mu \text{g}/\surd $ Hz, 700 Hz $\Sigma \Delta $ High-Order Electromechanical Modulator for a High-Q Micromechanical Capacitive Accelerometer
2018 Edition, Volume 18, February 1, 2018 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A switched-capacitor sigma-delta (ΣΔ) CMOS interface circuit for the closed-loop operation of a micromechanical capacitive accelerometer is presented in this paper. A distributed-feedback and feedforward topology is proposed to combine with a high-Q sensor...

Solving FSR Versus Offset-Drift Trade-Offs With Three-Axis Time-Switched FM MEMS Accelerometer
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper describes the working principle, the design, and the characterization of a three-axis frequency-modulated MEMS accelerometer, in which the differential frequency readout is performed through a novel time-switched approach. The...

Solving FSR Versus Offset-Drift Trade-Offs With Three-Axis Time-Switched FM MEMS Accelerometer
2018 Edition, Volume 27, October 1, 2018 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper describes the working principle, the design, and the characterization of a three-axis frequencymodulated MEMS accelerometer, in which the differential frequency readout is performed through a novel time-switched approach. The...

A low power MEMS-ASIC silicon resonant accelerometor with sub--¦g bias instability and -¦30g full-scale
2016 Edition, February 1, 2016 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper demonstrates a silicon resonant accelerometer which consists of a MEMS structure and an ASIC readout circuit. The MEMS sensor is fabricated in an 80-μm thick SOI process with a wafer level vacuum package. For noise reduction, several techniques are...

A Sub-µg Bias-Instability MEMS Oscillating Accelerometer With an Ultra-Low-Noise Read-Out Circuit in CMOS
2015 Edition, Volume 50, September 1, 2015 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper describes a SOI MEMS oscillating accelerometer with a fully differential CMOS continuous-time read-out circuit. A new ultra-low-noise continuous-time bandpass transimpedance amplifier (TIA) is proposed and serves as the front-end of the read-out...

Heterodyne Sensing CMOS Array with High Density and Large Scale: A 240-GHz, 32-Unit Receiver Using A De-Centralized Architecture
2018 Edition, June 1, 2018 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper reports the first large-scale, dense sub-THz heterodyne array featuring: (1) compactness of units: two interleaved 4×4 arrays with A/2 unit pitch are integrated in a 1.2-mm2 space; (2) multi-functionality of circuits: each array...

A 32-Unit 240-GHz Heterodyne Receiver Array in 65-nm CMOS With Array-Wide Phase Locking
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper reports a 32-unit phase-locked dense heterodyne receiver array at fRF=240 GHz. To synthesize a large receiving aperture without large sidelobe response, this chip has the following two features. The first feature is the small size of...

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