loading
22 GHz amplifier using a 0.12 μm CMOS technology
2006 Edition, May 1, 2006 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A 22 GHz low-noise amplifier (LNA) was designed, fabricated in standard 0.12 μm CMOS technology and measured. The LNA chip achieves a maximum gain of 5.5 dB, a noise figure of 10.3 dB and return losses at in-/output of 15 and 10 dB,...

A Broadband 42-63-GHz Amplifier Using 0.13-μm CMOS Technology
2007 Edition, June 1, 2007 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

An amplifier using 0.13-μm standard mixed signal/radio frequency complementary metal-oxide- semiconductor (CMOS) technology is presented in this paper. This four-stage cascode thin-film microstrip amplifier achieves the peak gains of 18.1 dB at 45...

Design of 2.4 GHz differential low noise amplifier using 0.18 μm CMOS technology
2016 Edition, April 1, 2016 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

In this paper the inductive degenerated Differential Low Noise Amplifier (DLNA) is designed with operating frequency 2.4 GHz using 0.18 μm CMOS Technology. The DLNA is biased at 1.8 V supply and perfectly matched with input impedance of 50 Ω. Designed DLNA...

A 19.1-dBm fully-integrated 24 GHz power amplifier using 0.18-μm CMOS technology
2008 Edition, October 1, 2008 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A 24 GHz, 19.1 dBm fully-integrated power amplifiers (PA) was designed and fabricated in the 0.18-mum deep n-well (DNW) CMOS technology. This power amplifier is a 2-stage design using cascode RF NMOS configuration and has a maximum...

A 19.1-dBm Fully-Integrated 24 GHz Power Amplifier Using 0.18-μm CMOS Technology
2008 Edition, October 1, 2008 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A 24 GHz, 19.1 dBm fully-integrated power amplifiers (PA) was designed and fabricated in the 0.18-iquestm deep n-well (DNW) CMOS technology. This power amplifier is a 2-stage design using cascode RF NMOS configuration and has a maximum...

A 19.1-dBm Fully-Integrated 24 GHz Power Amplifier Using 0.18-μm CMOS Technology
2008 Edition, October 1, 2008 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A 24 GHz, 19.1 dBm fully-integrated power amplifiers (PA) was designed and fabricated in the 0.18-mum deep n-well (DNW) CMOS technology. This power amplifier is a 2-stage design using cascode RF NMOS configuration and has a maximum...

A high-efficiency good linearity 21 to 26.5 GHz fully integrated power amplifier using 0.18 μm CMOS technology
2016 Edition, October 1, 2016 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents the design and implementation of a 21-26.5 GHz broadband, two stages CMOS power amplifier (PA) for quasi-millimeter wave band wireless communication systems. The proposed PA is designed using staggered tuning method [1], which is...

SEE characterization of the AMS 0.35 μm CMOS technology
2013 Edition, September 1, 2013 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This work presents experimental results for the single-event effects characterization of a commercial (Austria Microsystems) 0.35 μm CMOS technology. It improves and expands previous results. The knowledge gained is being applied in the development of a RHBD...

Device Characterisation of a High-Performance 0.25 μm CMOS Technology
1992 Edition, September 1, 1992 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

The device design, fabrication and characterisation of NMOS and PMOS transistors of a 0.25 μm CMOS technology will be discussed. The devices were optimized for a reduced power supply voltage of 2.5 V. High quality devices with good control of short channel effects...

Millimeter-wave static frequency divider in 0.13-μm CMOS technology
2011 Edition, June 1, 2011 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

Frequency dividers are one of the most significant blocks in Millimeter-wave communication systems and became a research hotspot in recent years. In this paper, an 8:1 static divider is implemented in 0.13-μm CMOS technology. The realized static divider achieved a...

Advertisement