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A 10-Bit 200-kS/s 1.76-μW SAR ADC With Hybrid CAP-MOS DAC for Energy-Limited Applications
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a low-power and area efficient 10-bit successive approximation register (SAR) analog-to-digital (ADC) with a hybrid capacitive-MOS consisting of a 7-bit MSB capacitive DAC (CDAC) and a...

A 10-bit 200-kS/s 1.76-μW SAR ADC with Hybrid CAP-MOS DAC for Energy-Limited Applications
2018 Edition, May 27, 2018 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a low-power and area efficient 10-bit SAR ADC with hybrid capacitive-MOS consisting of a 7-bit MSB capacitive DAC (CDAC) and a 3-bit LSB MOS DAC, which consumes less power...

A 0.6-V 10-bit 200-kS/s SAR ADC With Higher Side-Reset-and-Set Switching Scheme and Hybrid CAP-MOS DAC
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a low-power and area efficient 10-bit SAR ADC with higher side-reset-and-set (HSRS) switching scheme and hybrid capacitive-MOS (CAP-MOS) DAC. The HSRS switching scheme consumes zero switching...

A 0.6-V 10-bit 200-kS/s SAR ADC With Higher Side-Reset-and-Set Switching Scheme and Hybrid CAP-MOS DAC
2018 Edition, Volume 65, November 1, 2018 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a low-power and area efficient 10-bit SAR ADC with higher side-reset-and-set (HSRS) switching scheme and hybrid capacitive-MOS (CAP-MOS) DAC. The HSRS switching scheme consumes zero switching...

A 12-bit 200-kS/s SAR ADC with hybrid RC DAC
2014 Edition, November 1, 2014 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A 12-bit 200-kS/s successive approximation register (SAR) analog-to-digital converter (ADC) is presented. A sample-and-hold amplifier (SHA) is employed to convert single-ended input signal into fully-differential signal. The proposed...

A 1-µW 10-bit 200-kS/s SAR ADC With a Bypass Window for Biomedical Applications
2012 Edition, Volume 47, November 1, 2012 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents an energy efficient successive-approximation-register (SAR) analog-to-digital converter (ADC) for biomedical applications. To reduce energy consumption, a bypass window technique is used to select switching sequences to skip...

A 0.6-V 10-bit 200-kS/s Fully Differential SAR ADC With Incremental Converting Algorithm for Energy Efficient Applications
2016 Edition, Volume 63, April 1, 2016 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper proposes a fully differential 10-bit energy efficient successive approximation register (SAR) analog-to-digital converter (ADC) by using incremental converting method. The voltage difference of the input between two successive samples is acquired...

A successive approximation A/D converter with 16 bit 200 kS/s in 0.6 /spl mu/m CMOS using self calibration and low power techniques
2001 Edition, Volume 2, January 1, 2001 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A low power (6.8 mW) 5 V analog 2.7 V digital 16 bit 200 kS/s charge redistribution self calibrating successive approximation (SA) analog/digital converter (ADC) is presented. The device is implemented in a 0.6 /spl mu/m CMOS technology with 2...

A 0.9V 12-bit 200-kS/s 1.07µW SAR ADC with ladder-based reconfigurable time-domain comparator
2014 Edition, August 1, 2014 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a SAR ADC for biomedical application, which has a strict limit on its power consumption. Thus, two techniques are introduced into its design: a novel ladder-based reconfigurable time domain (RTD) comparator is proposed to reduce...

A 65-fJ/Conversion-Step 0.9-V 200-kS/s Rail-to-Rail 8-bit Successive Approximation ADC
2007 Edition, Volume 42, October 1, 2007 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

An 8-bit successive approximation (SA) analog-to- digital converter (ADC) in 0.18 mum CMOS dedicated for energy-limited applications is presented. The SA ADC achieves a wide effective resolution bandwidth (ERBW) by applying only one...

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