loading
An ultra-wideband CMOS receiver front-end
2007 Edition, October 1, 2007 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A CMOS receiver front-end for ultra-wideband (UWB) wireless communications based on multi-band OFDM alliance (MBOA)/WiMedia standard proposal is presented. Employing a direct conversion architecture, the RF front-end chip integrates a...

A Sub-mW All-Passive RF Front End with Implicit Capacitive Stacking Achieving 13 dB Gain, 5 dB NF and +25 dBm OOB-IIP3
2019 Edition, June 1, 2019 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a sub-mW mixer-first RF front-end that exploits a novel capacitive stacking technique in an altered bottom-plate N-path filter/mixer to achieve passive voltage gain and high-linearity at low noise figure. Capacitive stacking is realized...

A 53-67 GHz Low-Noise Mixer-First Receiver Front-End in 65-nm CMOS
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

In this paper, we present a mixer-first receiver front-end suitable for millimeter wave (mm-wave) applications. The proposed architecture includes a modified single-balanced mixer core with an on-chip balun in order to provide a differential output from an...

Adaptive front-end throttling for superscalar processors
2014 Edition, August 1, 2014 - Association for Computing Machinery (ACM)

To achieve high performance, conventional superscalar processors maintain maximum front-end instruction delivery bandwidth, which is often suboptimal when program behavior and priority metrics change. This paper proposes an adaptive front-end throttling...

An 80.2 dB DR 23.25 mW/Channel 8-Channel Ultrasound Receiver with a Beamforming Embedded SAR ADC
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

An 8-channel ultrasound receiver compatible with in-probe electronics for 3D ultrasound imaging is proposed. It has eight analog front-ends for signal conditioning and a beamforming embedded SAR ADC for performing both an 8-to-1 analog summation and its...

Quadrature Synthetic Aperture Beamforming Front-End for Miniaturized Ultrasound Imaging
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A quadrature synthetic aperture front-end receiver for B-mode ultrasound imaging is presented. The receiver targets small-scale imaging applications such as capsule endoscopy and low-cost portable devices. System complexity, area, power consumption, and cost are...

A LTE RX front-end with digitally programmable multi-band blocker cancellation in 28nm CMOS
2017 Edition, April 1, 2017 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a LTE receiver front-end with a feedback digital filter in the baseband to perform multiband blocker cancellation. The programmable filter provides 34.9dB attenuation of TX leakage and variable attenuation of an additional blocker...

Analysis and Optimization of RF Front-End for MICS Band Receiver
2019 Edition, April 1, 2019 - IEEE - Institute of Electrical and Electronics Engineers, Inc.

An optimized receiver RF front-end, including inductorless Balun LNA and voltage driven double balanced passive mixer for medical implant communication service (MICS) is presented. The system operates in the 402-405 MHz MICS band. Balanced output, noise and distortion canceling...

A Fully Integrated 150-GHz Transceiver Front-End in 65-nm CMOS
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

A fully integrated D-band transceiver front-end with on-chip frequency synthesizer is implemented in 65-nm CMOS. The transceiver front-end adopts the dual-conversion sliding-IF heterodyne architecture to relax the design difficulty of the local oscillation...

A Broadband CMOS RF Front End for Direct Sampling Satellite Receivers
Volume PP - IEEE - Institute of Electrical and Electronics Engineers, Inc.

This paper presents a comparative analysis between two new architectures for RF programmable-gain amplifiers (RFPGAs): voltage-mode RFPGA-V\! and current-mode RFPGA-I. RFPGA-V utilizes multiple-switch-multiple-amplifier configuration and gain interpolation method to achieve...

Advertisement