IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 55ns 64K dynamic MOS RAM with tripple diffused MOS transistor

Author(s): Nagayama, Y. ; Ohbayashi, Y. ; Taniguchi, M. ; Yoshihara, T. ; Nakano, T.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1982
Conference Location: San Francisco, CA, USA, USA
Conference Date: 13 December 1982
Page(s): 620 - 623
DOI: 10.1109/IEDM.1982.190369
Regular:

To obtain the higher performance dynamic MOS RAM, there exist three key parameters for device technologies. The higher performance transistor, the lower resistance interconnections and the smaller... View More

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