IEEE - Institute of Electrical and Electronics Engineers, Inc. - CMOS Latch-up elimination using Schottky barrier PMOS

Author(s): Sugino, M. ; Akers, L.A. ; Rebeschini, M.E.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1982
Conference Location: San Francisco, CA, USA, USA
Conference Date: 13 December 1982
Page(s): 462 - 465
DOI: 10.1109/IEDM.1982.190325
Regular:

A common failure mechanism in bulk CMOS integrated circuits is due to latch-up of the parasitic SCR structure. Using Schottky barrier junctions for the source and drain of the P channel... View More

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