IEEE - Institute of Electrical and Electronics Engineers, Inc. - Characterization of CMOS latch-up

Author(s): Huang, C.C. ; Hartranft, M.D. ; Pu, N.F. ; Yue, C. ; Rahn, C. ; Schrankler, J. ; Kirchner, G.D. ; Hampton, F.L. ; Hendrickson, T.E.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1982
Conference Location: San Francisco, CA, USA, USA
Conference Date: 13 December 1982
Page(s): 454 - 457
DOI: 10.1109/IEDM.1982.190323
Regular:

The purpose of the work was to characterize the latch-up in an N-well CMOS process with minimum channel length of 1.25\microm. Structures including SCRs, buffers, inverters, and input protections... View More

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