IEEE - Institute of Electrical and Electronics Engineers, Inc. - Topography dependent electrical parameter simulation

Author(s): Keunmyung Lee ; Sakai, Y. ; Neureuther, A.R.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1982
Conference Location: San Francisco, CA, USA, USA
Conference Date: 13 December 1982
Page(s): 298 - 301
DOI: 10.1109/IEDM.1982.190278
Regular:

The effect of wafer topography on the resistance and interlayer capacitance of deposited films is simulated from SAMPLE deposition profiles using a new post processor called RACPLE. The algorithm... View More

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