IEEE - Institute of Electrical and Electronics Engineers, Inc. - Recessed gate junction field effect transistors

Author(s): Baliga, B.J.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1980
Conference Location: Washington, DC, USA, USA
Conference Date: 8 December 1980
Page(s): 784 - 786
DOI: 10.1109/IEDM.1980.189955
Regular:

A recessed gate structure is described for vertical channel junction gate field effect transistors. This structure can be fabricated using a self-aligned source-gate process with the use of only... View More

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