IEEE - Institute of Electrical and Electronics Engineers, Inc. - Computer architecture using NMOS technology

1980 IEEE International Solid-State Circuits Conference

Author(s): M. Druke ; E. Buckley ; R. Gusowski ; D. Carberry ; R. Feaver ; R. March
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1980
Conference Location: San Francisco, CA, USA, USA
Conference Date: 13 February 1980
Volume: XXIII
Page(s): 110 - 111
DOI: 10.1109/ISSCC.1980.1156143
Regular:

A family of NMOS devices for a CPU chip which executes 16-bit register-to-register operations in a single 400ns microcycle, and memory-to-register moves in 2 microcycles, will be... View More

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