IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 64-bit planar double-diffused monolithic memory chip

1969 IEEE International Solid-State Circuits Conference

Author(s): Agusta, B.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1969
Conference Location: Philadelphia, PA, USA, USA
Conference Date: 19 February 1969
Volume: XII
Page(s): 38 - 39
DOI: 10.1109/ISSCC.1969.1154699
Regular:

A 40-ns access bipolar monolithic memory of 2021 words × 144 bits capacity has been developed and incorporated in a computing system. The design and structure of a 64-bit silicon chip will be... View More

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