IEEE - Institute of Electrical and Electronics Engineers, Inc. - Integrated Clock Mesh Synthesis With Incremental Register Placement

Author(s): Jianchao Lu ; Xiaomi Mao ; B. Taskin
Sponsor(s): IEEE Council on Electronic Design Automation
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 February 2012
Volume: 31
Page Count: 11
Page(s): 217 - 227
ISSN (Paper): 0278-0070
ISSN (Online): 1937-4151
DOI: 10.1109/TCAD.2011.2173491
Regular:

A clock mesh planning and synthesis method is proposed which significantly reduces the power dissipation on the network while considering the power density and timing slack simultaneously. The... View More

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