IEEE - Institute of Electrical and Electronics Engineers, Inc. - Fabrication of High Aspect Ratio TSV and Assembly With Fine-Pitch Low-Cost Solder Microbump for Si Interposer Technology With High-Density Interconnects

Author(s): Aibin Yu ; J. H. Lau ; Soon Wee Ho ; A. Kumar ; Wai Yin Hnin ; Wen Sheng Lee ; Ming Ching Jong ; V. N. Sekhar ; V. Kripesh ; D. Pinjala ; S. Chen ; Chien-Feng Chan ; Chun-Chieh Chao ; Chi-Hsin Chiu ; Chih-Ming Huang ; C. Chen
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2011
Volume: 1
Page Count: 9
Page(s): 1,336 - 1,344
ISSN (Paper): 2156-3950
ISSN (Online): 2156-3985
DOI: 10.1109/TCPMT.2011.2155655
Regular:

Fabrication of high aspect ratio through silicon vias (TSVs) in a Si interposer and fine pitch solder microbumps on a top Si die is discussed in this paper. Chip stacking result of the Si... View More

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