IEEE - Institute of Electrical and Electronics Engineers, Inc. - Large-scale broad-band parasitic extraction for fast layout verification of 3-D RF and mixed-signal on-chip structures

Author(s): Feng Ling ; V.I. Okhmatovski ; W. Harris ; S. McCracken ; Aykut Dengi
Sponsor(s): IEEE Microwave Theory and Techniques Society
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Volume: 53
Page(s): 264 - 273
ISSN (Paper): 0018-9480
ISSN (Online): 1557-9670
DOI: 10.1109/TMTT.2004.839907
Regular:

A methodology for efficient parasitic extraction and verification flow for RF and mixed-signal integrated-circuit designs is presented. The implementation of a multiplane precorrected fast Fourier... View More

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