IEEE - Institute of Electrical and Electronics Engineers, Inc. - A DDS-based PLL for 2.4-GHz frequency synthesis

Author(s): A. Bonfanti ; F. Amorosa ; C. Samori ; A.L. Lacaita
Sponsor(s): IEEE Circuits & Syst. Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2003
Volume: 50
Page Count: 4
Page(s): 1,007 - 1,010
ISSN (Paper): 1057-7130
DOI: 10.1109/TCSII.2003.820250
Regular:

In this transactions brief, we present a direct digital synthesizer (DDS)-based phase-locked loop (PLL), for frequency synthesis at 2.4 GHz with 80-MHz tuning range. The DDS signal is mixed with... View More

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