IEEE - Institute of Electrical and Electronics Engineers, Inc. - Split-path skewed (SPS) CMOS buffer for high performance and low power applications

Author(s): F. Hamzaoglu ; M.R. Stan
Sponsor(s): IEEE Circuits & Syst. Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2001
Volume: 48
Page Count: 5
Page(s): 998 - 1,002
ISSN (Paper): 1057-7130
DOI: 10.1109/82.974792
Regular:

Splitting a regular multistage CMOS buffer into two separate paths, and then skewing each path in opposite directions to achieve faster delay leads to a new, high-speed, split-path skewed (SPS)... View More

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