IEEE - Institute of Electrical and Electronics Engineers, Inc. - Circuits and Synthesis Mechanism for Hardware Design to Counter Power Analysis Attacks

2014 17th Euromicro Conference on Digital System Design (DSD)

Author(s): Partha De ; Kunal Banerjee ; Chittaranjan Mandal ; Debdeep Mukhopadhyay
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2014
Conference Location: Verona, Italy
Conference Date: 27 August 2014
Page(s): 520 - 527
ISBN (Electronic): 978-1-4799-5793-4
DOI: 10.1109/DSD.2014.61
Regular:

Execution of cryptographic algorithm in hardware or software usually leaves power/current traces that are dependent on the data being processed. Power analysis attacks (PAAs) have been found to be... View More

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