IEEE - Institute of Electrical and Electronics Engineers, Inc. - Residue arithmetic's using reversible logic gates

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)

Author(s): I. B. K. Raju ; P. Rajesh Kumar ; P. Bhaskara Rao
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2014
Conference Location: Combiatore, India
Conference Date: 6 March 2014
Page(s): 1 - 6
ISBN (Electronic): 978-1-4799-1356-5
ISBN (DVD): 978-1-4799-1355-8
DOI: 10.1109/ICDCSyst.2014.6926193
Regular:

The Residue number system (RNS) has been employed for efficient parallel carry-free arithmetic computations in DSP applications. Residue addition is the instrumental component in implementing... View More

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