IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design of high speed DDR SDRAM controller with less logic utilization

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)

Author(s): Pooran Singh ; Bhupendra Reniwal ; Vikas Vijayvargiya ; Santosh Kumar Vishvakarma
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2014
Conference Location: Combiatore, India
Conference Date: 6 March 2014
Page(s): 1 - 6
ISBN (Electronic): 978-1-4799-1356-5
ISBN (DVD): 978-1-4799-1355-8
DOI: 10.1109/ICDCSyst.2014.6926129
Regular:

This paper focuses on controlling synchronous dynamic random access memory (SDRAM) higher data transfer rates when multiple locations in internal memory array are accessed successively. The... View More

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