IEEE - Institute of Electrical and Electronics Engineers, Inc. - In-placement clock-tree aware multi-bit flip-flop generation for power optimization

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Author(s): Chih-Cheng Hsu ; Yu-Chuan Chen ; Mark Po-Hung Lin
Sponsor(s): IEEE Counc. Electron. Design Autom.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2013
Conference Location: San Jose, CA, USA
Conference Date: 18 November 2013
Page(s): 592 - 598
ISBN (Electronic): 978-1-4799-1071-7
ISSN (Electronic): 1558-2434
ISSN (Paper): 1092-3152
DOI: 10.1109/ICCAD.2013.6691177
Regular:

Utilizing multi-bit flip-flops (MBFFs) is one of the most effective power optimization techniques in modern nanometer integrated circuit (IC) design. Most of the previous work apply MBFFs without... View More

Advertisement