IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 0.127-mm2, 5.6-mW, 5th-order SC LPF with +23.5-dBm IIP3 and 1.5-to-15-MHz clock-defined bandwidth in 65-nm CMOS

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Author(s): Yaohua Zhao ; Pui-In Mak ; Man-Kay Law ; Rui P. Martins
Sponsor(s): IEEE Solid-State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2013
Conference Location: Singapore, Singapore
Conference Date: 11 November 2013
Page(s): 361 - 364
ISBN (Electronic): 978-1-4799-0280-4
ISBN (Paper): 978-1-4799-0277-4
DOI: 10.1109/ASSCC.2013.6691057
Regular:

This paper proposes two techniques for improving the linearity and power efficiency of switched-capacitor (SC) circuits. The first is a high-speed switched-current-assisting (SCA) path that... View More

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