IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 0.18nJ/Matrix QR decomposition and lattice reduction processor for 8×8 MIMO preprocessing

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Author(s): Chun-Fu Liao ; Jhong-Yu Wang ; Yuan-Hao Huang
Sponsor(s): IEEE Solid-State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2013
Conference Location: Singapore, Singapore
Conference Date: 11 November 2013
Page(s): 161 - 164
ISBN (Electronic): 978-1-4799-0280-4
ISBN (Paper): 978-1-4799-0277-4
DOI: 10.1109/ASSCC.2013.6691007
Regular:

This study presents a joint QR decomposition and lattice reduction processor for 8×8 multiple-input multiple-output (MIMO) systems. The proposed algorithm enhances the BER performance by lattice... View More

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