IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Classification Processor for a Support Vector Machine with Embedded DSP Slices and Block RAMs in the FPGA

2013 IEEE 7th International Symposium on Embedded Multicore/Manycore System-on-Chip (MCSoC)

Author(s): Yuki Ago ; Koji Nakano ; Yasuaki Ito
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2013
Conference Location: Tokyo, Japan
Conference Date: 26 September 2013
Page(s): 91 - 96
ISBN (Electronic): 978-0-7695-5086-2
DOI: 10.1109/MCSoC.2013.30
Regular:

This paper presents an FPGA implementation of a Support Vector Machine (SVM) classification using the DSP slices and block RAMs in the Xilinx Virtex-6 family FPGA. In our approach, the SVM... View More

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