IEEE - Institute of Electrical and Electronics Engineers, Inc. - On-chip clock error characterization for clock distribution system

2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

Author(s): Chuan Shan ; Dimitri Galayko ; Francois Anceau
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2013
Conference Location: Natal, Brazil
Conference Date: 5 August 2013
Page(s): 102 - 108
ISBN (Electronic): 978-1-4799-1331-2
ISSN (Paper): 2159-3469
DOI: 10.1109/ISVLSI.2013.6654630
Regular:

In this paper, we investigate a test strategy for characterization of clock error statistics between two clock domains in high-speed clocking systems (gigahertz and more). The method allows an... View More

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