IEEE - Institute of Electrical and Electronics Engineers, Inc. - FPGA Design of an Open-Loop True Random Number Generator

2013 16th Euromicro Conference on Digital System Design

Author(s): Florent Lozach ; Molka Ben-Romdhane ; Tarik Graba ; Jean-Luc Danger
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2013
Conference Location: Los Alamitos, CA, USA
Conference Date: 4 September 2013
Page(s): 615 - 622
ISBN (Electronic): 978-1-4799-2978-8
DOI: 10.1109/DSD.2013.73
Regular:

This paper presents the design methodology of a metastability-based True Random Number Generator (TRNG) on a Xilinx FPGA. As its structure is based on an open-loop delay chain, it provides both... View More

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