IEEE - Institute of Electrical and Electronics Engineers, Inc. - Voltage Spikes on the Substrate to Obtain Timing Faults

2013 16th Euromicro Conference on Digital System Design

Author(s): K. Tobich ; P. Maurine ; P.-Y Liardet ; M. Lisart ; T. Ordas
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2013
Conference Location: Los Alamitos, CA, USA
Conference Date: 4 September 2013
Page(s): 483 - 486
ISBN (Electronic): 978-1-4799-2978-8
DOI: 10.1109/DSD.2013.146
Regular:

Fault attacks are widely deployed against secure devices by hardware evaluation centers. While the least expensive fault injection techniques, like clock or voltage glitches, are well taken into... View More

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