IEEE - Institute of Electrical and Electronics Engineers, Inc. - Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology

2013 16th Euromicro Conference on Digital System Design

Author(s): Pedro P. Carballo ; Omar Espino ; Romen Neris ; Pedro Hernandez-Fernandez ; Tomasz M. Szydzik ; Antonio Nunez
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2013
Conference Location: Los Alamitos, CA, USA
Conference Date: 4 September 2013
Page(s): 415 - 422
ISBN (Electronic): 978-1-4799-2978-8
DOI: 10.1109/DSD.2013.52
Regular:

This paper describes key concepts in the design and implementation of a deblocking filter (DF) for a H.264/SVC video decoder. The DF supports QCIF and CIF video formats with temporal and spatial... View More

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