IEEE - Institute of Electrical and Electronics Engineers, Inc. - An Efficient Router Architecture and Its FPGA Prototyping to Support Junction Based Routing in NoC Platforms

2013 16th Euromicro Conference on Digital System Design

Author(s): Muhammad Awais Aslam ; Shashi Kumar ; Rickard Holsmark
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2013
Conference Location: Los Alamitos, CA, USA
Conference Date: 4 September 2013
Page(s): 297 - 300
ISBN (Electronic): 978-1-4799-2978-8
DOI: 10.1109/DSD.2013.121
Regular:

As mesh topology NoC is becoming a standard for implementing multi-core and multi-processor SoCs, there is a focus on developing routing algorithms for efficient on-chip communication. Junction... View More

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