IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Fast and Autonomous HLS Methodology for Hardware Accelerator Generation under Resource Constraints

2013 16th Euromicro Conference on Digital System Design

Author(s): Adrien Prost-Boucle ; Olivier Muller ; Frederic Rousseau
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2013
Conference Location: Los Alamitos, CA, USA
Conference Date: 4 September 2013
Page(s): 201 - 208
ISBN (Electronic): 978-1-4799-2978-8
DOI: 10.1109/DSD.2013.30
Regular:

This paper presents a new methodology for hardware accelerator generation, in the context of High Level Synthesis (HLS) for Field Programmable Gate Array (FPGA) components. The very high computing... View More

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