IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 1.8 V 64.9 uW 54.1 dB SNDR 1st order sigma-delta modulator design using clocked comparator Based Switched Capacitor technique

2013 5th Asia Symposium on Quality Electronic Design (ASQED)

Author(s): Sourav Chakraborty ; Manodipan Sahoo ; Hafizur Rahaman
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2013
Conference Location: Penang, Malaysia
Conference Date: 26 August 2013
Page(s): 220 - 226
ISBN (CD): 978-1-4799-1312-1
ISBN (Electronic): 978-1-4799-1314-5
DOI: 10.1109/ASQED.2013.6643591
Regular:

Continued scaling of feature sizes have led to reduction in OpAmp gain thus making it unsuitable for using in a negative feedback system. Comparator Based Switched Capacitor (CBSC) circuits have... View More

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