IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 1.2V 84dB 8mW time-interleaved sample and hold circuit in 90 nm CMOS

2013 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)

Author(s): Amir Zjajo
Sponsor(s): IEEE Electron Devices Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2013
Conference Location: Hong Kong, China
Conference Date: 3 June 2013
Page(s): 1 - 2
ISBN (Electronic): 978-1-4673-2523-3
DOI: 10.1109/EDSSC.2013.6628204
Regular:

This paper reports design, efficiency and measurement results of time interleaved sample and hold circuit based on closed loop switched capacitor technique. The prototype sample and hold with 84... View More

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