IEEE - Institute of Electrical and Electronics Engineers, Inc. - The Floating-Point Unit of the Jaguar x86 Core

2013 IEEE 21st Symposium on Computer Arithmetic (ARITH)

Author(s): J. Rupley ; J. King ; E. Quinnell ; F. Galloway ; K. Patton ; P. Seidel ; J. Dinh ; Hai Bui ; A. Bhowmik
Sponsor(s): IEEE Comput. Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2013
Conference Location: Austin, TX, USA
Conference Date: 7 April 2013
Page(s): 7 - 16
ISBN (Paper): 978-1-4673-5644-2
ISSN (Paper): 1063-6889
DOI: 10.1109/ARITH.2013.24
Regular:

The AMD Jaguar x86 core uses a fully-synthesized, 128-bit native floating-point unit (FPU) built as a co-processor model. The Jaguar FPU supports several x86 ISA extensions, including x87, MMX,... View More

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