IEEE - Institute of Electrical and Electronics Engineers, Inc. - Exploiting instruction-level parallelism for integrated control-flow monitoring

Author(s): M.A. Schuette ; J.P. Shen
Sponsor(s): IEEE Comput. Soc. Tech. Committee on Distributed Process
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 February 1994
Volume: 43
Page Count: 12
Page(s): 129 - 140
ISSN (Paper): 0018-9340
DOI: 10.1109/12.262118
Regular:

Computer architectures are using increased degrees of instruction-level machine parallelism to achieve higher performance, e.g., superpipelined, superscalar and very long instruction word (VLIW)... View More

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