IEEE - Institute of Electrical and Electronics Engineers, Inc. - Digitally synthesized stochastic flash ADC using only standard digital cells

2011 Symposium on VLSI Circuits

Author(s): Weaver, S. ; Hershberg, B. ; Un-Ku Moon
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2011
Conference Location: Kyoto, Japan, Japan
Conference Date: 15 June 2011
Page(s): 266 - 267
ISBN (CD): 978-4-86348-166-4
ISBN (Paper): 978-1-61284-175-5
ISSN (CD): 2158-5601
ISSN (Electronic): 2158-5636
ISSN (Paper): 2158-5601
Regular:

An ADC is synthesized entirely from Verilog code in 90nm digital CMOS using a standard digital cell library. An analog comparator is generated by cross-coupling two 3-input NAND gates. The random... View More

Advertisement