IEEE - Institute of Electrical and Electronics Engineers, Inc. - Adaptive robustness tuning for high performance domino logic

2011 Symposium on VLSI Circuits

Author(s): Giridhar, B. ; Fick, D. ; Fojtik, M. ; Satpathy, S. ; Bull, D. ; Sylvester, D. ; Blaauw, D.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2011
Conference Location: Kyoto, Japan, Japan
Conference Date: 15 June 2011
Page(s): 190 - 191
ISBN (CD): 978-4-86348-166-4
ISBN (Paper): 978-1-61284-175-5
ISSN (CD): 2158-5601
ISSN (Electronic): 2158-5636
ISSN (Paper): 2158-5601
Regular:

A new domino design style is proposed that provides performance gains of up to 71% over conventional domino, and is demonstrated in a 32b multiplier in 65nm CMOS. The design dynamically tunes... View More

Advertisement