IEEE - Institute of Electrical and Electronics Engineers, Inc. - A low-latency GALS interface implementation

APCCAS 2010-2010 IEEE Asia Pacific Conference on Circuits and Systems

Author(s): Yuan-Teng Chang ; Wei-Che Chen ; Hung-Yue Tsai ; Wei-Min Cheng ; Chang-Jiu Chen ; Fu-Chiung Cheng
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2010
Conference Location: Kuala Lumpur, Malaysia, Malaysia
Conference Date: 6 December 2010
Page(s): 1,183 - 1,186
ISBN (CD): 978-1-4244-7455-4
ISBN (Electronic): 978-1-4244-7456-1
ISBN (Paper): 978-1-4244-7454-7
DOI: 10.1109/APCCAS.2010.5774997
Regular:

With the VLSI technology improving rapidly, SoC has been becoming the most important VLSI application. However, clock distribution and low power have already become the two most important issues... View More

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