IEEE - Institute of Electrical and Electronics Engineers, Inc. - ADC clock jitter measurement and correction using a stochastic TDC

APCCAS 2010-2010 IEEE Asia Pacific Conference on Circuits and Systems

Author(s): Chi-Wei Fan ; Jieh-Tsorng Wu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2010
Conference Location: Kuala Lumpur, Malaysia, Malaysia
Conference Date: 6 December 2010
Page(s): 1,007 - 1,010
ISBN (CD): 978-1-4244-7455-4
ISBN (Electronic): 978-1-4244-7456-1
ISBN (Paper): 978-1-4244-7454-7
DOI: 10.1109/APCCAS.2010.5774884
Regular:

The jitter of the sampling clock of an analog-to-digital converter (ADC) is measured by a stochastic time-to-digital converter (TDC). The measured jitter data are used to correct the ADC sampling... View More

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